Semiconductor Engineering· Muhammad Hassan·· 55 分钟前
3D-IC 信号完整性如何用系统级方法验证
A System-Level Approach To Protecting 3D-IC Signal Integrity
事实摘要
针对 CoWoS、SoIC、EMIB、Foveros 等 2.5D/3D 封装中 D2D 接口、微凸块、TSV 与硅中介层带来的阻抗不连续、串扰和 ISI 问题，文章提出需以覆盖芯片、中介层、封装基板与 HBM 堆栈的完整通道做系统级信号完整性验证，而非分别验证各模块。
原文与核验
这条信号在站内保留事实摘要与战略研判。完整内容和上下文请以原文为准；融资、并购与技术效果以原始披露为准。
正文 · 原文摘要
Accurate SI analysis must account for interactions across vertical interconnects, interposers, silicon bridges, package transitions, and neighboring high-speed channels. The post A System-Level Approach To Protecting 3D-IC Signal Integrity appeared first on Semiconductor Engineering .
来源只提供摘要，完整内容请打开原文。
来源：Semiconductor Engineering · semiengineering.com
所属事件：3D-IC 信号完整性验证需覆盖完整通道