慕尼黑工业大学用神经网络加速3nm纳米片SPICE仿真
Neural Networks Speed 3nm Nanosheet SPICE Simulation (TU Munich)
慕尼黑工业大学研究人员发表论文，提出基于神经网络的晶体管模型，用于3nm纳米片器件的超快速SPICE仿真与标准单元库表征。在标准单元库表征中，该模型对延迟和总功率的误差分别为低于0.11%和0.76%，耗时最多减少8倍，对比对象为Verilog-A实现的BSIM-CMG紧凑模型。论文还给出神经网络规模与电路仿真精度关系的分析。
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Researchers at Technical University of Munich published “NN-Based Transistor Modeling for Ultra-Fast SPICE Simulation and Standard Cell Library Characterization.” Abstract: “Neural network (NN)-based transistor models have proven to be a promising solution to accelerate device modeling. Although these models demonstrated remarkable speedup in circuit simulations, they were not rigorously tested in complex tasks within standard... » read more The post Neural Networks Speed 3nm Nanosheet SPICE Simulation (TU Munich) appeared first on Semiconductor Engineering .
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来源：Semiconductor Engineering · semiengineering.com