UT Austin 提出 APPlace：协同优化器件位置与接入点，改善模拟电路布局
Co-Optimizing Access Points Improves Analog Placement (UT Austin)
得克萨斯大学奥斯汀分校研究人员发布 APPlace，一个在全局布局阶段协同优化器件位置与接入点（AP）选择的布线感知模拟布局框架，随后通过合法化阶段保留全局布局建立的结构。在四个真实模拟基准上，APPlace 在相近布局面积下取得优于代表性基线的整体后布局性能。消融实验显示，移除 AP 协同优化会使 OTA 基准的 CMRR 最多损失 13 dB，比较器延迟增加 23%。
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Researchers at the University of Texas at Austin published “APPlace: Co-Optimizing Device Locations and Access Points for Routing-Aware Analog Placement.” Abstract “Analog layout automation remains challenging in Analog/Mixed-Signal circuit design, because parasitics and mismatches introduced during layout strongly affect circuit performance. Placement is especially critical among the layout stages, as it constrains the routing solution... » read more The post Co-Optimizing Access Points Improves Analog Placement (UT Austin) appeared first on Semiconductor Engineering .
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来源：Semiconductor Engineering · semiengineering.com